Power switching circuits such as bridge circuits are commonly used in a variety of applications. A circuit schematic of a prior art 3-phase bridge circuit 10 configured to drive a motor is shown in FIG. 1. Each of the three half bridges 15, 25, and 35 in circuit 10 includes two transistors (41-46), which are able to block voltage in a first direction and are capable of conducting current in the first direction or optionally in both directions. In applications where the transistors employed in the bridge circuit 10 are only capable of conducting current in one direction, for example when silicon IGBTs are used, an anti-parallel diode (not shown) may be connected to each of the transistors 41-46. The transistors 41-46 are each capable of blocking a voltage at least as large as the high voltage (HV) source 11 of the circuit 10 when they are biased in the OFF state. That is, when the gate-source voltage VGS of any of transistors 41-46 is less than the transistor threshold voltage Vth, no substantial current flows through the transistor when the drain-source voltage VDS (i.e., the voltage at the drain relative to the source) is between 0V and HV. When biased in the ON state (i.e. with VGS greater than the transistor threshold voltage), the transistors 41-46 are each capable of conducting sufficiently high current for the application in which they are used. The transistors 41-46 may be enhancement mode or E-mode transistors (normally off, Vth>0), or depletion mode or D-mode (normally on, Vth<0) transistors. In power circuits, enhancement mode devices are typically used to prevent accidental turn on in which may cause damage to the devices or other circuit components. Nodes 17, 18, and 19 are all coupled to one another via inductive loads, i.e., inductive components such as motor coils (not shown in FIG. 1).
FIG. 2a shows a prior art half bridge 15 of the full 3-phase motor drive in FIG. 1, along with the winding of the motor (inductive component 21) between nodes 17 and 18 and the transistor 44, into which the motor current feeds. For this phase of power, transistor 44 is continuously on (Vgs44>Vth) and transistor 42 is continuously off (Vgs42<Vth, i.e., Vgs42=0V if enhancement mode transistors are used), while transistor 41 is modulated with a pulse width modulation (PWM) signal to achieve the desired motor current. FIG. 2b indicates the path of the current 27 during the time that transistor 41 is biased on. For this bias, the motor current flows through transistors 41 and 44, while no current flows through transistor 42 because transistor 42 is biased off, and the voltage at node 17 is close to HV, so transistor 42 blocks a voltage which is close to HV.
As used herein, the term “blocking a voltage” refers to a transistor, device, or component being in a state for which substantial current, such as current that is greater than 0.001 times the average operating current during regular on-state conduction, is prevented from flowing through the transistor, device, or component when a voltage is applied across the transistor, device, or component. In other words, while a transistor, device, or component is blocking a voltage that is applied across it, the total current passing through the transistor, device, or component will not be greater than 0.001 times the average operating current during regular on-state conduction.
Referring to FIG. 2c, when transistor 41 is switched off, no current can flow through transistor 41, and so the motor current flows in the reverse direction through transistor 42, which can occur whether transistor 42 is biased on or off. Alternatively, an anti-parallel freewheeling diode (not shown) can be connected across transistor 42, in which case the reverse current flows through the freewheeling diode. During such operation, the inductive component 21 forces the voltage at node 17 to a sufficiently negative value to cause reverse conduction through transistor 42, and transistor 41 blocks a voltage which is close to HV.
In many high voltage circuit applications, the circuit components are mounted on a substrate which includes a ceramic or other electrically insulating, high thermal conductivity material, such as AlN or Al2O3. The electrically insulating, high thermal conductivity material is coated on at least one side (typically both sides) with a high heat capacity metal, such as copper, thereby allowing for heat generated by the circuit components to be dissipated. In particular, direct bonded copper (DBC) substrates, which are formed by direct bonding of pure copper in a high temperature melting and diffusion process to a ceramic isolator such as AlN or Al2O3, are suitable substrates. An exemplary DBC prior art substrate, which includes copper layers 61 and 62 bonded to opposite sides of ceramic layer 60, is illustrated in FIG. 3. DBC substrates are currently only available as single layer substrates, unlike lower thermal conductivity printed circuit board (PCB) substrates, which can be formed with multiple insulating layers stacked on top of each other with a conductive metal layer between each successive insulating layer. The process used to form DBC substrates, which ensures sufficiently high thermal conductivity for high voltage applications, can currently only be used to form DBC substrates that include a single insulating/ceramic layer with pure copper layers directly bonded to each side. Hence, layouts that incorporate DBC substrates have been limited to single layers of metal-ceramic-metal DBC material. While PCB substrates can be formed with multiple insulating layers each separated by a metal layer, which allows for more flexibility in circuit layout, the thermal conductivity and/or heat capacity of such substrates, which are lower than those of DBC substrates, are not sufficiently high for many high voltage circuits, for example bridge circuits used for power conversion
Referring back to FIGS. 2a-2c, the mode of switching illustrated in prior art FIGS. 2a-2c is commonly known as hard-switching. A hard-switching circuit configuration is one in which the switching transistors are configured to have high currents passing through them as soon as they are switched ON, and to have high voltages across them as soon as they are switched OFF. More specifically, a hard-switching circuit configuration is one in which the switching transistors are configured to be switched from OFF to ON while the transistors are sustaining a large drain-source voltage, and to have high currents passing through them as soon as they are turned ON. Transistors switched under these conditions are said to be “hard-switched”. Hard-switched circuits tend to be relatively simple and to be operable at a wide range of output load powers. However, hard-switched circuits are typically prone to large voltage overshoots and hence high levels of EMI. Alternative circuit configurations make use of additional passive and/or active components, or alternatively signal timing techniques, to allow the transistors to be “soft-switched”. A soft-switching circuit configuration is one in which the switching transistors are configured to be switched ON during zero-current (or near zero-current) conditions or during zero-voltage (or near zero-voltage) conditions. Soft-switching methods and configurations have been developed to reduce switching losses and to address the high levels of electro-magnetic interference (EMI) and associated ringing observed in hard-switched circuits, especially in high current and/or high voltage applications. While soft-switching can in many cases alleviate these problems, the circuitry required for soft switching typically includes many additional components, resulting in increased overall cost and complexity. Soft-switching also typically requires that the circuits be configured to switch only at specific times when the zero-current or zero-voltage conditions are met, hence limiting the control signals that can be applied and in many cases reducing circuit performance. Furthermore, due to the required resonance conditions for soft-switching operation, the output load for each soft-switched circuit must be within a given range of values, thereby limiting the operation range of the circuit. Hence, alternative configurations and methods are desirable for hard-switched power switching circuits in order to prevent excessively high voltage overshoots and to maintain sufficiently low levels of EMI while allowing for a wide range of output loads.